1. Field of the Invention
The present invention relates to a semiconductor memory device having a cell in which the substrate surface of a channel portion is curbed.
2. Description of the Related Art
As a memory cell of a nonvolatile memory, a cell (to be referred to as a curved cell hereinafter) in which the substrate surface of a channel portion is evenly curved is proposed in, e.g., U.S. Pre-Grant Publication No. 2006/0046388 A1, FIG. 1.
In this curved cell, if the pitch of active areas AA is decreased, a tunnel insulating film, charge storage layer, and block insulating film fill the space between adjacent active areas AA, so the control gate electrode cannot enter this space any longer. This makes it difficult to ensure a large effective channel area and large effective charge storage layer area.
For example, when the film thicknesses of the tunnel insulating film, charge storage layer, and block insulating film are respectively 4, 6, and 10 nm in a nonvolatile memory having a MONOS (Metal-Oxide-Nitride-Oxide-Silicon) structure, if the half pitch of the active areas AA is decreased to about 20 to 25 nm, the channel area and charge storage layer area to which a desired electric field is applied in accordance with a voltage applied to the control gate electrode become smaller than those of a cell (to be referred to as a flat cell hereinafter) having a flat substrate surface.
As described above, micropatterning makes it difficult to secure a large effective channel area and large effective charge storage layer area in the conventional curved cell. This poses the problem that when reading out cell data, it is impossible to obtain a high ON/OFF ratio of a transistor current corresponding to the level of the cell data. In addition, the amount of electric charge injected into the charge storage layer reduces. If charge leakage occurs during data retention, therefore, the influence on the threshold value of a cell transistor increases.